The Source/Drain Engineering of Nanoscale Germanium-based MOS Devices
This book mainly focuses on reducing the high parasitic resistance in the source/drain of germanium nMOSFET. With adopting of the Implantation After Germanide (IAG) technique, P and Sb co-implantation technique and Multiple Implantation and Multiple Annealing (MIMA) technique, the electron Schottky barrier height of NiGe/Ge contact is modulated to 0.1eV, the thermal stability of NiGe is improved to 600°C and the contact resistivity of metal/n-Ge contact is drastically reduced to 3.8×10−7Ω•cm2, respectively. Besides, a reduced source/drain parasitic resistance is demonstrated in the fabricated Ge nMOSFET. Readers will find useful information about the source/drain engineering technique for high-performance CMOS devices at future technology node.
What people are saying - Write a review
We haven't found any reviews in the usual places.
Other editions - View all
achieved ammonium fluoride annealing at 500 Appl Phys Lett As+ implantation bandgap characteristics of NiGe/n-Ge CMOS contact resistivity CTLM dopant activation concentration dopant segregation doped drive-in annealing temperature electrical characteristics electrical concentration Electron Device Lett electron SBH enhanced eSBH fabrication Fermi level pinning gate Ge-based device Ge-based SB nMOSFETs germanidation germanium high electron SBH high-performance hole SBH I–V characteristics IAG technique IEEE Electron Device implantation damage implantation dose implantation energy ion implantation Ion/Ioff ratio leakage current level pinning effect metal S/D metal/Ge contact MIMA technique morphology n-type dopant activation NiGe film NiGe/Ge contact NiGe/n-Ge NiGe/p-Ge diodes nitrogen ambient nMOS ohmic characteristics Ohmic Contact P-Substrate P-Substrate P+ and As+ P+Sb implanted sample process flow rapid thermal annealing reduced reverse current Rseries Sb co-implantation technique SBH modulation Schottky barrier height Schottky diodes silicide silicon single implantation Source/Drain Engineering source/drain parasitic resistance stability of NiGe Strain silicon substrate thesis transistor Voltage